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april 2010 doc id 13632 rev 4 1/18 18 st1s09 2 a, 1.5 mhz pwm step-d own switching regulator with synchronous rectification features 1.5 mhz fixed frequency pwm with current control mode 2 a output current capability typical efficiency: > 90% 2 % dc output voltage tolerance two versions available: power good or inhibit integrated output over-voltage protection non switching quiescent current: (typ) 1.5 ma over temperature range r dson (typ) 100 m utilizes tiny capaci tors and inductors operating junction temp. -30 c to 125 c available in dfn6 (3 x 3 mm) exposed pad description the st1s09 is a step-down dc-dc converter optimized for powering low output voltage applications. it supplies a current in excess of 2 a over an input voltage range from 2.7 v to 6 v. a high pwm switching frequency (1.5 mhz) allows the use of tiny surface-mount components. moreover, since the required synchronous rectifier is integrated, the number of the external components is reduced to minimum: a resistor divider, an inductor and two capacitors. the power good function continuously monitors the output voltage. an open drain power good flag is released when the output voltage is within regulation. in addition, a low output ripple is guaranteed by the current mode pwm topology and by the use of low esr smd ceramic capacitors. the device is thermally protected and the output current limited to prevent damages due to accidental short circuit. the st1s09 is available in the dfn6 (3 x 3 mm) package. dfn6 (3 x 3 mm) table 1. device summary order codes package st1s09pur dfn6d (3 x 3 mm) st1s09apur (1) dfn6d (3 x 3 mm) ST1S09IPUR dfn6d (3 x 3 mm) 1. available on request. www.st.com
st1s09 2/18 doc id 13632 rev 4 contents 1 diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 8 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
st1s09 diagram doc id 13632 rev 4 3/18 1 diagram (*) only for st1s09ipu (**) only for st1s09pu figure 1. schematic diagram
pin configuration st1s09 4/18 doc id 13632 rev 4 2 pin configuration figure 2. pin connections (top view) st1s09a st1s09i st1s09 table 2. pin description pin n symbol name and function 1 fb feedback voltage 2 gnd system ground 3 sw switching pin 4v in_sw power supply for the mosfet switch 5v in_a power supply for analog circuit 6 inh/pg/nc inhibit (to turn off the device) / power good / not connected exposed pad gnd to be connected to pcb ground plane for optimal electrical and thermal performance
st1s09 maximum ratings doc id 13632 rev 4 5/18 3 maximum ratings note: absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. table 3. absolute maximum ratings symbol parameter value unit v in_sw positive power supply voltage -0.3 to 7 v v in_a positive power supply voltage -0.3 to 7 v v inh inhibit voltage (i version) -0.3 to v i + 0.3 v switch voltage max. voltage of output pin -0.3 to 7 v v fb feedback voltage -0.3 to 3 v pg power good open drain -0.3 to 7 v t j max junction temperature -40 to 150 c t stg storage temperature range -65 to 150 c t lead lead temperature (soldering) 10 sec 260 c table 4. thermal data symbol parameter value unit r thjc thermal resistance junction-case 10 c/w r thja thermal resistance j unction-ambient 55 c/w table 5. esd performance symbol parameter test conditions value unit esd esd protection voltage hbm 2 kv esd esd protection voltage mm 500 v
electrical characteristics st1s09 6/18 doc id 13632 rev 4 4 electrical characteristics refer to figure 21 application circuit v in_sw = v in_a = 5 v, v o = 1.2 v, c1 = 4.7 f, c 2 = 22 f, l1 = 2.7 h, t j = -30 to 125 c (unless otherwise specified. typical values are referred to 25 c) table 6. electrical characteristics for st1s09pu symbol parameter test conditions min. typ. max. unit fb feedback voltage 784 800 816 mv i fb v fb pin bias current 600 na v i input voltage i o = 10 ma to 2 a 4.5 5.5 v uv lo under voltage lock out threshold v i rising 3.5 3.7 3.9 v hysteresis 150 mv ovp over voltage protection threshold v o rising 1.05 v o 1.1 v o v over voltage protection hysteresis v o falling 5 % i ovp overvoltage clamping current v o = 1.2 v 300 ma i q quiescent current not switching 1.5 2.5 ma i o output current v i = 4.5 to 5.5 v (1) 2a %v o / v i output line regulation v i = 4.5 v to 5.5 v, i o = 100 ma (1) 0.16 %v o / v i %v o / i o output load regulation i o = 10 ma to 2 a (1) 0.2 0.6 % pwmf s pwm switching frequency v fb = 0.65 v 1.2 1.5 1.8 mhz d max maximum duty cycle 80 87 % pg power good output threshold 0.92 v o v power good output voltage low i sink = 6 ma open drain output 0.4 v r dson -n nmos switch on resistance i sw = 750 ma 0.1 r dson -p pmos switch on resistance i sw = 750 ma 0.1 i swl switching current limitation (1) 2.5 2.9 3.5 a efficiency (1) i o = 10 ma to 100 ma, v o = 3.3 v 65 % i o = 100 ma to 2 a, v o = 3.3 v 82 87 t shdn thermal shutdown 150 c t hys thermal shutdown hysteresis 20 c %v o / i o load transient response i o = 100 ma to 1 a, t a = 25 c t r = t f 200 ns (1) -10 +10 %v o %v o / i o short circuit removal response i o = 10 ma to i o = short, t a = 25 c (1) -10 +10 %v o 1. guaranteed by design, but not tested in production.
st1s09 electrical characteristics doc id 13632 rev 4 7/18 refer to figure 22 application circuit v in_sw = v in_a = v inh = 5 v, v o = 1.2 v, c1 = 4.7 f, c2 = 22 f, l1 = 2.7 h, t j = -30 to 125 c (unless otherwise specified. typical values are referred to 25 c) table 7. electrical characteristics for st1s09ipu symbol parameter test conditions min. typ. max. unit fb feedback voltage 784 800 816 mv i fb v fb pin bias current 600 na v i minimum input voltage i o = 10 ma to 2 a 2.7 v ovp over voltage protection threshold v o rising 1.05 v o 1.1 v o v over voltage protection hysteresis v o falling 5 % i q quiescent current v inh > 1.2 v, not switching 1.5 2.5 ma v inh < 0.4 v, t = - 30 c to 85 c 1 a i o output current v i = 2.7 to 5.5 v (1) 2a v inh inhibit threshold device on, v i = 2.7 to 5.5 v 1.3 v device on, v i = 2.7 to 5 v 1.2 device off 0.4 i inh inhibit pin current 2a %v o / v i output line regulation v i = 2.7 v to 5.5 v, i o = 100 ma (1) 0.16 %v o / v i %v o / i o output load regulation i o = 10 ma to 2 a (1) 0.2 0.6 %v o / i o pwmf s pwm switching frequency v fb = 0.65 v 1.2 1.5 1.8 mhz d max maximum duty cycle 80 87 % r dson -n nmos switch on resistance i sw = 750 ma 0.1 r dson -p pmos switch on resistance i sw = 750 ma 0.1 i swl switching current limitation (1) 2.5 2.9 3.5 a efficiency (1) i o = 10 ma to 100 ma, v o = 3.3 v 65 % i o = 100 ma to 2 a, v o = 3.3 v 82 87 t shdn thermal shutdown 150 c t hys thermal shutdown hysteresis 20 c %v o / i o load transient response i o = 100 ma to 1 a, t a = 25 c t r = t f 200 ns (1) -10 +10 %v o %v o / i o short circuit removal response i o = 10 ma to i o = short, t a = 25 c (1) -10 +10 %v o 1. guaranteed by design, but not tested in production.
typical performance characteristics st1s09 8/18 doc id 13632 rev 4 5 typical performance characteristics l = 3.3 h, c i = 4.7 f, c o = 22 f, unless otherwise specified. figure 3. voltage feedback vs. temperature figure 4. feedback pin bias current vs. temp. figure 5. quiescent current non switching vs. temperature figure 6. inhibit voltage vs. temperature figure 7. inhibit voltage vs. input voltage figure 8. output voltage vs. input voltage 760 770 780 790 800 810 820 830 840 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] v fbk [mv] v o @1.2v v i =5v, i o =10ma 760 770 780 790 800 810 820 830 840 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] v fbk [mv] v o @1.2v v i =5v, i o =10ma -60 40 140 240 340 440 540 640 740 840 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] i fbk [na] v i =5v -60 40 140 240 340 440 540 640 740 840 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] i fbk [na] v i =5v v o @1.2v 0 0.5 1 1.5 2 2.5 3 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] iq [ma] v i =5v v o @1.2v 0 0.5 1 1.5 2 2.5 3 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] iq [ma] v i =5v v i =5v, i o =from 10ma to 2a 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] v inh [v] on off v i =5v, i o =from 10ma to 2a 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] v inh [v] on off v i =from 2.7 to 5.5v, i o =2a 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 234567 v i [v] v inh [v] on off v i =from 2.7 to 5.5v, i o =2a 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 234567 v i [v] v inh [v] on off v cc =v inh =from 0 to 5.5v, i o =2a v o @1.2v 0.00 0.20 0.40 0.60 0.80 1.00 1.20 1.40 0123456 v i [v] v o [v] v cc =v inh =from 0 to 5.5v, i o =2a v o @1.2v 0.00 0.20 0.40 0.60 0.80 1.00 1.20 1.40 0123456 v i [v] v o [v]
st1s09 typical performance characteristics doc id 13632 rev 4 9/18 figure 9. line regulation vs. temperature fi gure 10. load regulation vs. temperature figure 11. pwm switching frequency vs. temperature figure 12. maximum duty cycle vs. temperature figure 13. under voltage lock out threshold vs. temperature figure 14. efficiency vs. output current -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] line [%v o t/ v i ] v o @1.2v v i = from 2.7v to 5.5v, i o = 100ma -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] line [%v o t/ v i ] v o @1.2v v i = from 2.7v to 5.5v, i o = 100ma -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] load [%v o / i o ] v o @1.2v v i = 5v, i o from10ma to 2a -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] load [%v o / i o ] v o @1.2v v i = 5v, i o from10ma to 2a 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] pwm freq.[mhz] v i =5v, v fb =0.6v v o @1.2v 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] pwm freq.[mhz] v i =5v, v fb =0.6v v o @1.2v v o @3.3v 70 72 74 76 78 80 82 84 86 88 90 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] dmax[%] v i =5v, v fb =0.6v v o @3.3v 70 72 74 76 78 80 82 84 86 88 90 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] dmax[%] v i =5v, v fb =0.6v v o @1.2v 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] uvlo [v] i o =10ma v o @1.2v 3 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] uvlo [v] i o =10ma 25 35 45 55 65 75 85 95 0 500 1000 1500 2000 iout [ma] efficiency [%] v in =5v v o =1.2v v o =3.3v
typical performance characteristics st1s09 10/18 doc id 13632 rev 4 figure 15. efficiency vs. temperature figure 16. over voltage protection vs. temperature figure 17. over voltage protection vs. temperature figure 18. over voltage protection hyst. vs. temperature figure 19. load transient fi gure 20. inhibit transient v i = 5 v, v o = 1.2 v, i o = 100 ma to1 a, l = 3.3 h, c i = 4.7 f, c o = 22 f v i = 5v, v inh = 0 to 2 v, i o = 2 a, l = 3.3 h, c i = 4.7 f, c o = 22 f, v o = 3.3 v 40 45 50 55 60 65 70 75 80 85 90 95 100 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] efficiency [%] v o =1.2v v o =3.3v v i =5v, i o =100ma 40 45 50 55 60 65 70 75 80 85 90 95 100 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] efficiency [%] v o =1.2v v o =3.3v v i =5v, i o =100ma v sw =1.2v 0.8 0.9 1 1.1 1.2 1.3 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] ovp %v o ovp on v i =5v, v o =3.3v, c fb =100nf resistor 1.2k from v i and v sw v sw =1.2v 0.8 0.9 1 1.1 1.2 1.3 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] ovp %v o ovp on v i =5v, v o =3.3v, c fb =100nf resistor 1.2k from v i and v sw 0.8 0.9 1 1.1 1.2 1.3 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] ovp %v o v sw =0.8v v i =5v, v o =3.3v, c fb =100nf resistor 1.2k from v i and v sw ovp on 0.8 0.9 1 1.1 1.2 1.3 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] ovp %v o v sw =0.8v v i =5v, v o =3.3v, c fb =100nf resistor 1.2k from v i and v sw ovp on 0 2 4 6 8 10 12 14 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] ovp % hysteresis v sw =0.8v v i =5v, v o =3.3v, c fb =100nf resistor 1.2k from v i and v sw ovp on 0 2 4 6 8 10 12 14 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] ovp % hysteresis v sw =0.8v v i =5v, v o =3.3v, c fb =100nf resistor 1.2k from v i and v sw ovp on v o i o v o i o v inh v o i o v inh v o i o
st1s09 typical application doc id 13632 rev 4 11/18 6 typical application figure 21. application circuits figure 22. application circuits
application information st1s09 12/18 doc id 13632 rev 4 7 application information the st1s09 is an adjustable current mode pwm step-down dc-dc converter with internal 2 a power switch, packaged in a dfn6 3 x 3 mm. the device is a complete 2 a switching regula tor with its internal co mpensation eliminating the need for additional components. the constant frequency, current mode, pwm architecture and stable operation with ceramic capacitors results in low, predictable output ripple. the over-voltage protection circuit acts when th e output voltage is over 10 % of the rated voltage and within 200 ns the low side mosfet will be turned on to clamp the output transient. the current limit for clamping is about 400 ma. when the output voltage drops to about 5 % above the nominal level, the device returns to nominal closed loop switching operation. the open drain power good (pg) pin is released when the output voltage is higher than 0.92 x v o_nom . if the output voltage is below 0.92 x v o , the pg pin goes to low impedance. other circuits fitted to the device protection are the thermal shut-down block, which turns off the regulator when the junction temperature exceeds 150 c (typ), and the cycle-by-cycle current limiting, which provides protection against shorted outputs. as an adjustable regulator, the st1s09?s output voltage is determined by an external resistor divider. the desired value is given by the following equation: equation 1 v o = v fb [1 + r 1 / r 2 ] to utilize the device, only a few components ar e required: an inductor , two capacitors and the resistor divider. the inductor chosen must be able to reach peak current level without saturating. its value can be selected while taking into account that a large inductor value increases the efficiency at low output current and reduces output voltage ripple, while a smaller inductor can be chosen when it is important to reduce package size and the total cost of the application. finally, the st1s09 has been designed to work properly with x5r or x7r smd ceramic capacitors both at the input and at the output. these types of capacitors, due to their very low series resistance (esr), minimize the output voltage ripple. other low esr capacitors can be used according to the need of the application without compromising the correct functioning of the device.
st1s09 package mechanical data doc id 13632 rev 4 13/18 8 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
package mechanical data st1s09 14/18 doc id 13632 rev 4 dim. mm. inch. min. typ. max. min. typ. max. a0. 8 01.000.0 3 10.0 39 a1 0 0.02 0.05 0 0.001 0.002 a 3 0.20 0.00 8 b 0.2 3 0.45 0.00 9 0.01 8 d2. 9 0 3 .00 3 .10 0.114 0.11 8 0.122 d2 2.2 3 2.50 0.0 88 0.0 98 e2. 9 0 3 .00 3 .10 0.114 0.11 8 0.122 e2 1.50 1.75 0.05 9 0.06 9 e0. 9 50.0 3 7 l0. 3 0 0.40 0.50 0.012 0.016 0.020 dfn6d ( 3 x 3 ) mechanical data 7 9 466 3 7b
st1s09 package mechanical data doc id 13632 rev 4 15/18 figure 23. dfn6 (3 x 3 mm) footprint recommended data
package mechanical data st1s09 16/18 doc id 13632 rev 4 dim. mm. inch. min. typ. max. min. typ. max. a 33 0 12. 99 2 c 12. 8 1 3 .2 0.504 0.51 9 d 20.2 0.7 9 5 n60 2. 3 62 t1 8 .4 0.724 ao 3 . 3 0.1 3 0 bo 3 . 3 0.1 3 0 ko 1.1 0.04 3 po 4 0.157 p 8 0. 3 15 tape & reel qfnxx/dfnxx ( 3 x 3 ) mechanical data
st1s09 revision history doc id 13632 rev 4 17/18 9 revision history table 8. document revision history date revision changes 18-jun-2007 1 first release. 05-jul-2007 2 removed incorrect watermark. 31-jan-2008 3 modified: table 6 on page 6 . 19-apr-2010 4 modified: table 1 on page 1 .
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